FFD |
This component represents a D-TYPE FLIP-FLOP. The D-TYPE FLIP-FLOP represent the elementary memory cell on the logic circuits.
The behavior of the device is the following :
The data present on the D input is frozen on the raising edge of the CK signal. The Q output reports the value of the last freeze cycle and the /Q signal reports the complement of the Q signal.
Net plugs
Plug |
Description |
D |
Boolean data input |
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CK |
CLOCK signal |
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Q |
Direct ( not negated ) output |
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/Q |
Negated ouput ( complement of Q output ) |